Wafer Sort Test Engineer
Core
Implementing testing solutions for Multi Product Wafer (MPW) Test Vehicles and upcoming new products for Samsung's latest process technology, including evaluating process BKMs on high volume manufacturing products.
Role type
Senior IC Wafer Sort Test Engineer
Builds
Robust, scalable, and optimized test infrastructure for Logic & SRAM test vehicles and full product testing (SoC, RF, Memory)
Domain
Semiconductor manufacturing / High-volume manufacturing (HVM)
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Advantest V93K and/or UltraFLEX test platforms expertise, hardware design (probe cards, interface boards), test pattern development, Vmin/Vmax data collection, wafer level SCAN diagnostics, SRAM Bitmap analysis, debugging tool/probing card issues, coding & scripting for debug, cross-functional alignment
Preferred skills
TEL prober and driver communication familiarity, mentoring junior engineers
Technologies
Advantest V93000, UltraFLEX, TEL prober
Responsibilities
Implementing testing solutions for MPW Test Vehicles and new products; Driving innovation in test engineering on V93000/UltraFLEX platforms; Designing/verifying hardware including probe cards and interface boards; Adding/Updating Test patterns and implementing Vmin/Vmax data collection; Implementing wafer level SCAN diagnostics and SRAM Bitmap data; Debugging tool/probing card issues and managing test program revisions
Seniority
Senior, hands-on IC with technical lead responsibilities
