Transmitter (Tx) SerDes Design Lead — 224G/448G
Core
Design and deliver high-speed electrical transmitter macros for 224G and 448G SerDes in deep-submicron CMOS technologies for broadband fiber-optic systems.
Role type
Senior IC analog/mixed-signal design lead (SerDes)
Builds
High-speed optical transmission solutions (WaveLogic family) for modern telecommunications networks
Domain
Telecommunications / High-speed analog circuit design
Deliverable
production ML models | product features
Required skills
Schematic-level design of DAC-based output stages, serializers, output drivers, and clocking circuits; Post-layout verification and extraction-based simulations; Root-cause analysis of performance gaps; Behavioral modeling (MATLAB, Verilog-A); Mentorship of junior engineers
Preferred skills
224G/448G PAM4/PAM6 SerDes design; OIF-CEI or IEEE standards knowledge; Signal/power integrity co-design (HFSS, EMX); Mixed-signal validation with high-speed probing
Technologies
Virtuoso, Calibre, STAR-RC, MMSIM, MATLAB, Verilog-A, C++, HFSS, EMX
Responsibilities
Own schematic design and post-layout verification of transmitter signal chain; Evaluate circuit topologies and recommend implementations based on tradeoffs; Drive extraction-based post-layout simulations to validate performance; Translate architecture requirements into transmitter implementation; Provide technical guidance and mentorship to junior design and layout engineers
Seniority
Senior, hands-on IC with mentorship responsibilities