CareerPlan

ATE Engineer - XPU (Yield, Quality & RMA)

USA-CA San Jose Innovation DriveFull-time$122k–$195k2026-11-09 → 2026-11-10

Core

Drive testing, yield optimization, quality assurance, and RMA failure analysis for high-performance XPU ASIC parts on advanced ATE platforms.

Role type

Senior IC ATE Test Engineer (Yield, Quality & RMA)

Builds

Robust ATE test solution recipes and patterns for product silicon

Domain

Semiconductor manufacturing (ASIC/XPU) + Advanced Packaging (2.5D/3D)

Required skills

ATE test development, yield optimization, RMA failure analysis, shmoo characterization, fault isolation, test time optimization, DUT hardware management, Linux scripting

Preferred skills

Advanced packaging knowledge, cross-functional collaboration with design/DFT teams

Technologies

Advantest PS1600, PS400B UHC4, 93K PinScale/Exascale, SmarTest 7.x/8.x, Linux RedHat

Responsibilities

Develop and deploy ATE test recipes; analyze test data to drive yield improvements; lead RMA characterization and root-cause debug; manage test file revisions and DUT hardware; coordinate with global R&D and design teams

Seniority

Senior, hands-on IC