Functional Safety Architect
Core
Own device safety architecture and lead efforts to achieve safety goals by developing technical safety concepts and allocating decomposed safety requirements for next-generation semiconductor devices.
Role type
Functional Safety Architect
Builds
Safety mechanisms and safety cases for ASICs/PLDs/CPUs
Domain
Semiconductor / Functional Safety
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Safety analyses (FTA, FMEA, DFA), SysML, requirements management, ASIL/SIL decomposition, fault tolerance, diagnostics coverage, IEC 61508/ISO 26262 compliance, safety certification (EXIDA/TUeV)
Preferred skills
RTL coding and simulation, SoC architecture engagement, complex program management
Technologies
SysML, Jama, FTA, FMEA, FMECA, HAZOP
Responsibilities
Architect new safety concepts and safety mechanism features; Perform safety analyses against CCF/CF to ensure fault tolerance; Define safe architecture patterns (lockstep CPUs, ECC memories, watchdogs); Review and contribute to writing safety requirement specifications; Guide teams on ASIL/SIL decomposition and diagnostics coverage; Review hardware/software safety designs for compliance; Collaborate on safety V&V strategy (fault injection, simulation); Document and present defensible safety case evidences aligned with IEC 61508/ISO 26262
Seniority
Senior, hands-on IC
