FPGA Compiler (Router) Engineer
Core
Develop and optimize FPGA routing algorithms within the compiler toolchain to improve performance, routability, and timing closure for next-generation FPGA devices.
Role type
FPGA Compiler Engineer (Routing)
Builds
FPGA compiler toolchain components for AI, cloud, networking, and edge applications
Domain
Electronic Design Automation (EDA) / FPGA Physical Design
Deliverable
production ML models | product features
Required skills
Graph algorithms, optimization techniques, C/C++, FPGA/ASIC design flows, routing algorithms (maze, negotiated congestion), timing-driven design, physical design concepts
Preferred skills
Commercial FPGA toolchains (Quartus, Vivado), FPGA architectures, parallel/distributed computing, scripting (Python, Tcl), timing analysis, placement algorithms
Technologies
C/C++, Python, Tcl, Quartus, Vivado
Responsibilities
Design and optimize routing algorithms for performance and timing; Contribute to compiler flow including placement and timing-driven optimization; Analyze runtime and memory efficiency of routing; Collaborate with architecture, synthesis, and hardware teams; Debug routing congestion and timing violations; Integrate routing features into compiler infrastructure
Seniority
Mid-level, hands-on IC