Ethernet IP Design Application Engineer
Core
Lead design bring-up and validation for high-speed Ethernet IPs (10G to 800G) and serve as the primary technical interface for customers to resolve complex issues and optimize performance.
Role type
Senior IC Ethernet IP Design Application Engineer
Builds
FPGA-based Ethernet IP solutions for networking infrastructure
Domain
Networking / Semiconductor / FPGA
Required skills
VHDL, Verilog, C/C++, Python, Perl, TCL, Ethernet protocol stack knowledge, debugging, root-cause analysis, performance optimization
Preferred skills
Experience with Auto-Negotiation/Link Training, IEEE 1588 PTP, cross-functional collaboration
Technologies
FPGA, Ethernet, 10G/25G/40G/50G/100G/200G/400G/800G, IEEE 1588, VHDL, Verilog, C, Python
Responsibilities
Lead design bring-up and validation for Ethernet IPs across speeds 10G to 800G; Act as primary technical interface for customers supporting debugging and issue resolution; Create technical collateral including user guides and reference designs; Collaborate with cross-functional teams to reproduce issues and drive root-cause analysis; Validate protocol compliance and performance.
Seniority
Senior, hands-on IC