Silicon Design and Validation Engineer
Core
Design, verification, and validation of analog and mixed-signal high-speed building blocks for ASIC products in data center networking.
Role type
Senior IC silicon design and validation engineer
Builds
High-speed data converters, SerDes, and optical I/O for data center networking
Domain
Semiconductor / Analog & Mixed-Signal IC Design
Deliverable
production ML models | product features
Required skills
Analog and mixed-signal IP design, verification and validation, high-speed data converters, SerDes, optical I/O, analog front-end circuits, Trans-Impedance Amplifiers (TIA), PLLs, VCOs, clocking circuitry, EDA integration, foundry PDK, bench test debug, signal integrity, power integrity, test development, Matlab, Python, measurement equipment (DCO, scopes, network analyzers), RF and high-speed probing, optical and electrical interconnect architectures, IEEE standards
Preferred skills
Advanced packaging (2.5D / 3D) architectures, RF and high-speed probing expertise
Technologies
Matlab, Python, DCO, oversampling/real time scopes, network analyzers
Responsibilities
Design and validate analog/mixed-signal high-speed building blocks, collaborate with cross-functional teams to launch ASICs, debug and characterize control loops (PLLs, LDOs), assess design bugs and recommend workarounds, perform SI/PI measurements for correlation and debugging
Seniority
Senior, hands-on IC