Sr. Associate PCB Engineer (Taipei)
Core
Senior PCB Layout Engineer responsible for end-to-end design of high-complexity multilayer and HDI boards for AI servers, data centers, and power systems.
Role type
Senior IC PCB Layout Engineer
Builds
Multilayer and HDI PCBs for AI Server, Data Center, Networking, Power, and Energy Storage applications
Domain
Semiconductor / Power Electronics / Hardware Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Cadence Allegro PCB Designer, OrCAD Capture, multilayer PCB design (8-30+ layers), HDI design (blind/buried/microvias), power distribution optimization, stack-up planning, DFM/DFA knowledge
Preferred skills
AI Server design, HVDC (800V) design, low-loss materials expertise, analog/mixed-signal circuit design experience
Technologies
Cadence Allegro, OrCAD Capture
Responsibilities
Manage complete PCB layout workflow from schematic ECO to manufacturing release, establish and maintain PCB footprint and layout libraries, collaborate with fabricators to resolve engineering queries and manufacturing issues, execute component placement and routing, design complex HDI structures
Seniority
Senior, hands-on IC
