Software Engineer - FPGA-Accelerated RTL Simulation
Core
Develop the C++ software component of a custom hardware emulation framework for RISC-V cores, enabling fast debugging and cost-effective deployment.
Role type
Senior C++ application engineer (hardware emulation stack)
Builds
Hardware emulation capacity for RISC-V core IP
Domain
Semiconductor / Chip design / RISC-V architecture
Deliverable
production ML models | product features | infrastructure
Required skills
C++20, multithreaded application development, high-performance computing, compiler development (LLVM/MLIR), FPGA RTL design
Preferred skills
Chisel, Xilinx FPGA optimization, ASIC RTL design
Technologies
C++, FireSim, MLIR, CIRCT, LLVM, Chisel, Xilinx
Responsibilities
Build and maintain the C++ application layer of the emulation framework, collaborate with FPGA RTL designers and compiler developers, contribute to debug tools for RISC-V co-design.
Seniority
Senior, hands-on IC
