Staff Verification Engineer - Security Blocks
Based in IndiaNo visa sponsorship
Core
Staff Verification Engineer responsible for planning, developing, and executing verification strategies for RISC-V security blocks and CPU architectures.
Role type
Staff IC verification engineer (CPU/Security)
Builds
RISC-V processor IP and security blocks
Domain
Semiconductor / Chip Design / RISC-V
Required skills
SystemVerilog, UVM, constrained-random verification, RTL debugging, coverage closure, RISC-V architecture, CPU micro-architecture, bus interfaces (AXI, PCIe), scripting (Python/Perl), C/C++
