Workload / Performance Model Lead
Core
Lead benchmarking and performance infrastructure development for RISC-V CPU IPs and accelerators.
Role type
Lead, Performance Modeling & Infrastructure
Builds
Performance evaluation tools, benchmarks, and simulation infrastructure for CPU/accelerator architecture development.
Domain
Semiconductor / Computer Architecture / RISC-V
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Computer architecture of high performance out-of-order CPU designs, Workload characterization, Discrete Event Simulation (DES), Object-oriented programming (OOP), Performance simulation tools (ISA to SoC), Workload reduction techniques, Software engineering best practices for large codebases
Preferred skills
Hardware development (RTL, FPGA flows), Software development (C/assembly, OS/RTOS, Compilers), FPGA debug, Git methodologies
Technologies
Simulators, Emulators, Hardware platforms, Integrated Logic Analyzer
Responsibilities
Identify, prepare, and analyze performance for processor/accelerator development; Analyze performance bottlenecks in micro-architecture and software stack; Develop innovative methods to characterize workloads on simulators, emulators, and hardware platforms; Develop performance projection methodology for complex workloads; Develop and deploy efficient tools and infrastructure for performance evaluation
Seniority
Senior, hands-on IC with leadership responsibilities
