Principal Analog Validation Engineer
Core
Comprehensive validation of key product indicators (KPIs) for all analog circuitry in a platform, ensuring instrumentation and automation are prepared for silicon testing.
Role type
Principal Analog Validation Engineer / Architect
Builds
Automated parametric validation plans, test scripts, and hardware measurement sequences for analog platforms.
Domain
Semiconductor / Analog Circuit Design / Validation
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Parametric validation planning, DUT configuration software, hardware automation sequencing, PVT analysis, hardware debugging, schematic reading, SerDes validation, signal integrity analysis
Preferred skills
TestStand, Python, C programming, AI prompting for software generation, Ethernet IEEE 802.3, PCIe protocols
Technologies
Oscilloscopes, BER testers, vector network analyzers, phase noise analyzers, Excel, JMP, PowerBI
Responsibilities
Build parametric validation plans from electrical specifications; Write software to configure device under test (DUT); Create hardware automation sequences for parametric measurements; Analyze parametric data to report pass/fail/margin; Interface with Design, Product & Test Engineering teams to debug IP-related issues; Research and recommend hardware for measurements; Generate hardware design requirements and participate in schematic/layout reviews
Seniority
Principal, hands-on IC with strategy & mentorship
