Lead Validation Engineer (UWB)
Core
Lead Pre-Silicon and Post-Silicon validation of SoCs/ASICs, focusing on high-speed and low-speed peripheral interfaces and embedded software/firmware development.
Role type
Senior IC validation engineer (SoC/ASIC)
Builds
Production-ready silicon chips and embedded systems
Domain
Semiconductor hardware design and embedded software
Deliverable
production ML models | product features
Required skills
Pre-Silicon and Post-Silicon validation, SoC architecture, ARM-based multicore SoCs, hardware-software interaction, lab equipment and protocol analyzers, debugging, Embedded C firmware, bare-metal and RTOS development, test automation (Python, Shell, Perl), peripheral interface validation (QSPI, XSPI, I2S, UART, SPI, I2C/I3C, CAN/CAN-FD, LIN)
Preferred skills
None stated
Technologies
FPGA, Emulation, Silicon platforms, logic analyzers, protocol analyzers, oscilloscopes, SWD, trace tools
Responsibilities
Review architecture and design specifications for SoC/IP features; Develop validation plans, test strategies, and coverage metrics; Execute validation test plans on FPGA, Emulation, and Silicon platforms; Lead first-silicon bring-up and characterization activities; Debug silicon issues using logic analyzers, protocol analyzers, oscilloscopes, SWD, and trace tools; Develop Embedded C firmware for silicon validation; Create board bring-up software and diagnostic frameworks; Implement test automation frameworks for silicon validation; Support customer issue resolution and field failure analysis.
Seniority
Senior, hands-on IC
