Staff Analog Validation Engineer – with AI/ML
Core
Develop and execute validation plans for analog and mixed-signal IPs in MCU and MPU products, utilizing AI/ML to automate analysis and predict performance.
Role type
Staff Analog Validation Engineer (AI/ML)
Builds
Next-generation MCU and MPU silicon products
Domain
Semiconductor / Analog & Mixed-Signal / Embedded Systems
Deliverable
production ML models | product features
Required skills
Analog and mixed-signal validation, electrical characterization (voltage, temperature, process corners, frequency), PLL/Oscillator/ADC/DAC/PMU validation, shmoo analysis, margin testing, stress testing, reliability characterization, silicon debug, MCU architectures, embedded systems, lab bring-up, JTAG, logic analyzers, oscilloscopes, AI/ML for anomaly detection, automated failure clustering, root-cause prediction, outlier identification, trend analysis, predictive analytics, dashboard development
Preferred skills
None stated
Technologies
JTAG, logic analyzers, oscilloscopes
Responsibilities
Develop and execute validation plans for analog and mixed-signal IPs, perform electrical characterization across voltage, temperature, process corners, and frequency ranges, validate analog subsystems including PLLs, ADCs, DACs, voltage regulators, PMUs, comparators, sensors, and clocking architectures, execute shmoo analysis, margin testing, stress testing, and reliability characterization, correlate silicon measurements against design and simulation expectations, identify, debug, and root-cause silicon issues, develop AI/ML solutions for anomaly detection, automated failure clustering, root-cause prediction, and outlier identification, apply machine learning to predict silicon performance variations and optimize validation coverage, build intelligent dashboards and predictive analytics tools
Seniority
Staff, hands-on IC
