Principal Digital IP Design Engineer (f/m/d)
Core
Develop and implement digital IP and logic designs for complex Mixed-Signal System-on-Chips (SoCs), including automotive microprocessors, application processors, micro-controllers, and networking components.
Role type
Principal Digital IP Design Engineer
Builds
Interface components, DSP subsystems, next generation AI/ML cores, and RISC-V IPs for automotive and networking products
Domain
Semiconductor / Digital IP / Automotive & Networking
Deliverable
production ML models | product features
Required skills
Digital IP design, Mixed-Signal SoC design, RTL design (Verilog/SystemVerilog), Lint/CDC/RDC verification, IP synthesis, timing analysis, DFT implementation, AMBA protocols (AHB, AXI, ACE, CHI), memory systems (ROM, RAM, Flash, DDR/LPDDR), CPU design (proprietary cores, RISC-V, AI/ML accelerators), Python/Perl/TCL/Shell scripting, pre-silicon/post-silicon debugging
Preferred skills
AI-based design tools, conversational German
Technologies
Verilog, SystemVerilog, C/C++, Python, Perl, TCL, Shell, FPGA, simulation/emulation tools
Responsibilities
Develop high-quality, area-optimal, low-power RTL designs; Collaborate with hardware, software, and architecture teams to define features and interfaces; Complete design quality checks (Lint, CDC/RDC); Conduct IP-level design verification (testbench, simulation, debugging); Perform IP synthesis and timing analysis; Ensure DFT requirements are met; Generate design documentation and participate in reviews; Troubleshoot design issues throughout the lifecycle; Stay updated with industry trends and tools
Seniority
Principal, hands-on IC
