FE CPIE PI MTS
Core
Drive product maturity (yield, repair density, DPM) and optimize process integration across FEOL, MOL, CELL, and BEOL loops for memory and storage solutions.
Role type
Senior Process Integration Engineer (FE CPIE PI MTS)
Builds
High-performance DRAM, NAND, and NOR memory and storage products
Domain
Semiconductor manufacturing (Memory/Storage)
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Process integration, Yield management, Circuit design knowledge, Cross-functional collaboration, Standardization, Travel
Preferred skills
Knowledge of FEOL/MOL/CELL/BEOL loops, Product and circuit design expertise
Technologies
DRAM, NAND, NOR, FEOL, MOL, CELL, BEOL
Responsibilities
Drive best-in-class product maturity including yield and product grades; Identify optimum process integration solutions; Collaborate with YE, Device, RDA, and Metrology teams to resolve yield issues; Identify and standardize best known methods across DRAM/NAND sites; Travel to Micron sites for face-to-face collaboration.