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F15 ADTJ PI Device Engineer

Hiroshima - Fab 15, Japan💼 Full-time🗓 2026-09-09 → 2026-09-26

Core

Ensure process stability and drive yield/quality improvements for HVM DRAM manufacturing by optimizing device performance and repair density consumption.

Role type

Senior IC Process Integration Engineer (Device)

Builds

High-volume DRAM memory chips

Domain

Semiconductor manufacturing (DRAM)

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

Semiconductor process engineering, data analysis, statistics, cross-functional collaboration, root-cause isolation, corrective/preventive actions

Preferred skills

Defect analysis, metrology analysis, SPC, structured problem solving

Technologies

SPC, metrology tools

Responsibilities

Create SWRs for device performance improvement, identify sweet spots balancing process integration and device performance, proceed with PCRBs using data summaries

Seniority

Mid-level, hands-on IC

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