YIELD ENHANCEMENT ENGINEER
Core
Identify, analyze, and resolve yield-limiting issues in advanced semiconductor manufacturing to drive yield improvement and defect reduction for next-generation memory products.
Role type
Yield Enhancement Engineer
Builds
High-performance DRAM, NAND, and NOR memory and storage products
Domain
Semiconductor manufacturing / Memory technology
Deliverable
production ML models | product features | dashboards & analysis
Required skills
Semiconductor device physics, statistical analysis, root-cause analysis (FMEA, 8D, SPC), data-driven decision making, scripting (Python, SQL), JMP
Preferred skills
Automation, machine learning, AI-driven analysis, SPC, DOE, FDC/EDA, defect inspection, inline metrology, memory architecture (DRAM/NAND), technology transfer, cross-site collaboration
Technologies
JMP, Python, SQL, FMEA, 8D, SPC, DOE, FDC/EDA
Responsibilities
Analyze inline/param/probe/DOE data to identify yield detractors; Apply semiconductor device physics and statistical tools to troubleshoot yield issues; Collaborate with module engineering teams to diagnose process/tool-related yield variation; Lead or participate in cross-functional task forces to solve complex yield, defect, or process integration challenges; Perform root-cause analysis using FMEA, 8D, SPC, and other structured methodologies; Publish clear Pareto analyses and maintain dashboards for assigned product lines; Support new technology transfer, process baseline setup, and qualification activities; Partner with equipment engineering, shift engineering, and quality teams to address long-term defect or excursion issues; Conduct material, process, and equipment evaluations and recommend optimization strategies; Ensure product performance meets design and reliability requirements and propose corrective actions when gaps exist.
Seniority
Mid-level, hands-on IC