ASIC Physical Design Engineer, Netlisting - New College Grad 2026
Core
Drive physical design of high-frequency and low-power CPUs, GPUs, SoCs at block, cluster, and full chip levels with a focus on netlist-related aspects.
Role type
ASIC Physical Design Engineer (Netlisting)
Builds
High-performance CPUs, GPUs, and SoCs for AI computing
Domain
Semiconductor / ASIC Design
Deliverable
production ML models
Required skills
Logic equivalence checking, Formal Verification, Clock-domain-crossing checking, MTBF analysis, Logic synthesis, EDA tools (Synopsys/Cadence), Scripting (Perl/TCL/Python)
Preferred skills
AI utilization for workflow improvement, Strong debugging capability
Technologies
Synopsys, Cadence, Perl, TCL, Python, Make
Responsibilities
Drive physical design at block/cluster/full-chip level; Perform equivalence checking and asynchronous checks; Assist in ECO generation and implementation
Seniority
Entry-level (New College Grad 2026)