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Yield Enhancement DRAM DA

Boise, ID - Main Site💼 Full-time🗓 2026-09-16 → 2026-09-25

Core

Characterize electrical data to identify device issues impacting yield and develop end-of-line performance predictions using machine learning for next-generation memory solutions.

Role type

Yield Analysis (DA) Engineer

Builds

Next-generation memory products and production transfer support

Domain

Semiconductor / Memory / Yield Engineering

Deliverable

production ML models | dashboards & analysis

Required skills

Semiconductor processing knowledge, CMOS and memory cell operation, statistical analysis, data extraction and reporting, programming (Python, R, SQL, JavaScript), machine learning techniques

Preferred skills

Device physics knowledge, cross-functional team leadership, process standardization, complex troubleshooting

Technologies

Python, R, SQL, JavaScript, Machine Learning, AI

Responsibilities

Analyze end-of-line test, parametric, and fab data to identify yield-impacting issues; Develop new yield analysis tools and implement ML/AI techniques; Identify process interactions and fail mechanisms; Drive process improvements using inline data; Standardize methods for consistent yield; Lead multi-area focus teams for complex yield troubleshooting; Provide feedback to R&D on design and process limitations; Publish analysis reports on process experiments; Support R&D to manufacturing site transfer

Seniority

Mid-Senior, hands-on IC

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