Engineer/Senior Engineer, STPG PE (FDV-Infrastructure)
Core
Design and execute functional and design validation flows for advanced RG NAND devices, developing test program infrastructure and applying AI/ML to improve test efficiency and root-cause analysis.
Role type
Senior IC silicon validation and infrastructure engineer (NAND)
Builds
Test program infrastructure, automation frameworks, and validation flows for NAND memory products
Domain
Semiconductor manufacturing / Memory storage / Silicon validation
Deliverable
production ML models | product features
Required skills
Silicon validation, failure analysis, automation framework development, C/C++/Python/Perl scripting, ATE test program development, memory product knowledge, root cause analysis, data analytics
Preferred skills
Experience with Teradyne or Advantest platforms, AI/ML for test analytics
Technologies
C, C++, Perl, Python, Teradyne, Advantest
Responsibilities
Design and execute functional and design validation flows for advanced RG NAND devices; Develop and maintain test program infrastructure including deterministic usage-case tests and random sequence generators; Implement automation frameworks to improve test development and execution efficiency; Apply AI/ML-assisted techniques for failure triage, root-cause analysis, and coverage gap identification; Perform electrical failure analysis and root-cause investigations of digital and analog circuitry issues
Seniority
Senior, hands-on IC
