EUV Mask Technology R&D Engineer
Core
Developing materials, films, and processes for next-generation EUV lithography to enable High-NA EUV manufacturing readiness.
Role type
R&D Engineer (EUV Mask Technology)
Builds
Next-generation EUV mask materials and processes for advanced DRAM scaling
Domain
Semiconductor manufacturing / EUV Lithography
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
EUV mask blank material development, film stack design, deposition, etch, clean, and patterning quality analysis, High-NA EUV readiness optimization, lithography requirements translation, DOE and fundamental analysis, cross-functional collaboration, FEOL process engineering transition
Preferred skills
Semiconductor mask/lithography/wafer fabrication experience, actinic mask inspection, defect printability analysis, mask repair, BEOL/FEOL process control, tool requirements definition, equipment supplier engagement, EUV/High-NA EUV mask/wafer technology development, lithography simulation, OPC, mask pattern design
Technologies
EUV systems, mask-to-wafer correlation, pattern transfer fidelity, lithography simulation, OPC, mask pattern design
Responsibilities
Develop EUV mask blank materials and processes including film stack design, deposition, etch, clean, and patterning quality; Advance High-NA EUV readiness through material selection, mask design, stitching, lithography performance optimization, and lifetime improvement; Translate lithography requirements into manufacturable mask solutions; Conduct data-driven R&D using DOE and fundamental analysis to improve yield, reliability, and manufacturability; Collaborate with cross-functional engineering teams to transition new technologies into FEOL process engineering
Seniority
Mid-level, hands-on IC