Photolithography Process Development Engineer (Advanced Patterning)
Core
Developing and characterizing next-generation 20nm-class logic technologies with a focus on photolithography, litho-etch integration, and advanced patterning techniques.
Role type
Senior IC process development engineer (advanced patterning)
Builds
Next-generation 20nm-class logic nodes for Texas Instruments
Domain
Semiconductor manufacturing (advanced logic nodes)
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Photolithography process development and optimization, Litho-etch integration (LELE, SADP, pitch splitting/doubling), OPC and Resolution Enhancement Techniques (RET) methodologies, Dry etch processes for pattern transfer, Critical dimension (CD) control and uniformity, Overlay and alignment challenges, Defectivity mechanisms and mitigation strategies
Preferred skills
Self-aligned multiple patterning (SAMP, SADP, SAQP), Advanced nodes below 22nm (16/14nm FinFET), High-volume manufacturing environment experience, Immersion lithography, DUV, multi-patterning processes, Design for Manufacturing
Technologies
Prolith, S-Litho, CD-SEM, Overlay, Scatterometry, JMP, Python
Responsibilities
Utilize lithography simulation software to analyze process windows and optimize patterning results, Utilize advanced metrology to identify defects and improve Critical Dimension Uniformity (CDU) and overlay performance, Work with equipment vendors to evaluate new materials, photoresists, and tool hardware upgrades, Analyze process data, identify root cause, and implement robust process improvements using SPC and DOE, Define pathfinding activities for new patterning technology and lead technology transfer from R&D to HVM, Lead development to create next generation Litho Shrink processes and drive litho-etch integration, Develop and implement resolution enhancement techniques (RET) and optical proximity correction (OPC) strategies, Evaluate and select materials systems including photoresists, hard masks, and anti-reflective coatings, Characterize and reduce patterning defects including line edge roughness (LER), CD variation, and overlay errors, Collaborate with Etch team to optimize pattern transfer, profile control, and CD uniformity
Seniority
Senior, hands-on IC