CareerPlanGet AI match score →

Senior Design Engineer

San Jose, CA💼 Full-time💰 $116,000–$116,000🗓 2026-05-08 → 2026-07-30

Core

Designing and optimizing analog and mixed-signal circuits for NAND memory products, specifically enabling compute-in-memory (CIM) use cases.

Role type

Senior IC analog/mixed-signal design engineer

Builds

High-performance NAND memory chips with integrated analog sensing and processing capabilities

Domain

Semiconductor / Memory / Analog Mixed-Signal

Deliverable

production ML models

Required skills

Analog/mixed-signal circuit design, ADC architecture design, semiconductor device physics, circuit debugging, layout planning, Python scripting, EDA tool usage

Preferred skills

HSPICE/Fast SPICE simulation, Cadence LVS/DRC, Linux/UNIX, Bash/Tcl

Technologies

Python, Bash, Tcl, HSPICE, Fast SPICE, Cadence, Verilog, Linux, UNIX

Responsibilities

Design, simulate, and optimize NAND analog/mixed-signal circuits for dual-mode storage and compute; Validate design performance via block and chip-level simulations; Collaborate with Product Engineering, Test, and Process Integration to ensure manufacturability; Build Python-based AI utilities to automate design tasks and regression runs.

Seniority

Senior, hands-on IC

Sourced via workday · Listed on CareerPlan, which tracks 70,000+ jobs from 20+ sources.
Apply on Workday ↗