Quantum CryoCMOS Device Modeling Engineer
Core
Develop, extract, validate, and deploy predictive compact models for CMOS transistors, superconducting elements, and photonic devices across room-temperature and cryogenic regimes to enable cryoCMOS PDKs and quantum control circuits.
Role type
Senior IC device modeling engineer (cryogenic/quantum)
Builds
Simulation-ready compact models for transistors, superconducting, and photonic elements
Domain
Semiconductor manufacturing, cryogenic electronics, quantum hardware
Deliverable
production ML models | product features
Required skills
Semiconductor device physics, transistor compact modeling, parameter extraction, SPICE-class simulation, Python/MATLAB scripting, electrical characterization data analysis, TCAD simulation, statistical modeling
Preferred skills
BSIM4/BSIM-CMG/PSP model families, cryogenic electronics (300K to 4K), Keysight IC-CAP/Synopsys Mystic, process-corner generation, Monte Carlo methods, PDK release support, superconducting/photonic device modeling
Technologies
Cadence Virtuoso/Spectre, Synopsys PrimeSim/HSPICE, Siemens EDA tools, Keysight IC-CAP, Synopsys Mystic, Python, MATLAB, Linux/Unix
Responsibilities
Develop and calibrate physics-based compact models for CMOS and related technologies; Develop and validate models for superconducting and photonic elements; Plan and execute parameter-extraction workflows using electrical characterization data; Correlate model behavior with measured data and physics; Define device and test-structure requirements; Integrate and qualify model files within PDK and EDA environments; Analyze temperature-dependent device behavior and variability; Collaborate with device engineering, PDK, and circuit-design teams
Seniority
Senior, hands-on IC
