Principal Engineer Design Enablement PDK – Device Library developer for Silicon Photonics
Core
Developing design components, PCELLs, and automation tools for Silicon Photonics Process Design Kits (PDKs) to enable device deployment for internal testsites and customer layouts.
Role type
Principal Engineer, Design Enablement (Silicon Photonics PDK Development)
Builds
Process Design Kits (PDKs) containing tech files, runtime code, and automation tools for Electronic Design Automation (EDA) workflows.
Domain
Semiconductor Manufacturing / Silicon Photonics / EDA
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
PDK development, Cadence PCELL creation, EDA tool runtime code development, process design rule interpretation, SPICE model analysis, DRC/LVS test case creation, technical documentation
Preferred skills
Silicon Photonics domain knowledge, ML or GenAI knowledge, Cadence Virtuoso/Skill programming, Unix/Linux systems, scripting languages (Perl, Tcl, Bash), semiconductor theory
Technologies
Cadence IC, Cadence OrCAD, Cadence Virtuoso, Cadence Skill, Perl, Tcl, Bash, Unix/Linux
Responsibilities
Develop design components for Device library of PDKs; Develop cadence PCELLs for enabling the deployment of photonic devices; Support layout design activities for internal testsites; Develop, deploy, support, maintain PDK Collection of tech files and runtime code; Develop, deploy, support, maintain automation tools that represents the Fab process; Review and interpret process design rules and SPICE model documents to create specification data; Create and maintain test cases for Company's Process Design Kits / DRC / LVS and perform quality assurance checks; Create and update release notes and application notes to document known limitations and solutions.
Seniority
Principal, hands-on IC with strategy & mentorship
