CareerPlan

Summer 2027 Masters High-Speed SerDes and Optical Interconnect Engineering Intern

Santa Clara, CaliforniaInternship2026-11-05 → 2026-11-10
On-site · United StatesNo visa sponsorship

Core

Support high-speed SerDes, optical transceiver, and cable validation for next-generation AI and data-center platforms.

Role type

High-Speed SerDes and Optical Interconnect Engineering Intern

Builds

Next-gen AI and data-center hardware platforms

Domain

Semiconductor / High-Speed Digital Communications / Photonics

Required skills

SerDes characterization, signal integrity analysis, optical transceiver evaluation, high-speed cable testing, BER/FEC analysis, Python scripting, test automation

Preferred skills

High-speed digital communications, Ethernet protocols, link training concepts, MATLAB, laboratory instrumentation

Technologies

SerDes, Optical Transceivers, AECs, Python, MATLAB

Responsibilities

Support high-speed SerDes characterization and parameter tuning; Assist with switch-to-AI-NIC interoperability testing; Evaluate optical transceivers, active electrical cables (AECs), and high-speed electrical channels; Collect and analyze BER, FEC, eye-diagram, and link-performance data; Develop Python scripts or AI-assisted tools for test automation and data analysis; Document test results and contribute to engineering qualification reports.

Seniority

Intern