Staff RAS Validation Engineer
Core
Lead end-to-end validation, debug, and enablement of Reliability, Availability, and Serviceability (RAS) features across next-generation Embedded x86 Programs.
Role type
Staff IC BIOS RAS Validation Engineer
Builds
AMD APU platforms with industry-leading quality, reliability, and resiliency
Domain
Semiconductor / Embedded x86 / System Validation
Required skills
x86 platform architecture, BIOS/UEFI, memory subsystems, system-level RAS validation, error detection and recovery, automated regression testing, root cause analysis, technical leadership
Preferred skills
DDR4/DDR5 memory architecture, ECC mechanisms, MCA architecture, PCIe AER, error injection frameworks, Linux-based validation environments, Python scripting, Jira, source control systems
Technologies
x86, BIOS/UEFI, DDR4, DDR5, ECC, MCA, PCIe, AER, Linux, Python, Jira
Responsibilities
Own validation strategy and quality sign-off for BIOS-driven RAS features; Define feature coverage plans, validation methodologies, and automation strategies; Validate system resiliency, error detection, error containment, recovery, and reporting mechanisms; Drive validation and debug of memory ECC, MCA architecture, error injection frameworks, PCIe AER, and watchdog/reset mechanisms; Collaborate with cross-functional teams to diagnose and resolve complex platform issues; Develop and execute automated regression suites; Analyze failures and perform root cause investigations; Mentor engineers and contribute to best practices
Seniority
Staff, hands-on IC and technical leadership
