CareerPlan

System Level Product Development Engineer

US, CA, Santa ClaraFull-time$136k2026-08-28 → 2026-11-10

Core

Develop new methodologies for reliable testing, characterization, yield enhancement, and spec validation of complex semiconductor chips at the System Level Test (SLT) stage.

Role type

Senior IC system-level product development engineer (semiconductor validation)

Builds

High-performance semiconductor chips (including HBM/GDDR memory)

Domain

Semiconductor hardware engineering / System-level product development

Required skills

chip characterization, yield enhancement, spec validation, root cause analysis, cross-functional collaboration, Python for data analysis

Preferred skills

HBM/GDDR memory experience, PC architecture knowledge, PCIe bus expertise, DRAM/DDR experience

Technologies

Python, SLT (System Level Test), PCIe, DRAM/DDR

Responsibilities

Solve complex testing challenges and develop new testing methodologies; Partner with ASIC, DFT, ATE, silicon validation, fab process, software, and quality teams; Initiate and drive process improvements through root cause analysis.

Seniority

Senior, hands-on IC