Senior Circuit Methodology Engineer
Core
Design, develop, and maintain circuit design and verification flows running on large-scale compute and GPU farms to support mixed-signal design and verification.
Role type
Senior IC circuit methodology engineer (infrastructure)
Builds
Compute and GPU infrastructure, automation tooling, and job scheduling flows for circuit design teams
Domain
Semiconductor / EDA / High-performance computing
Required skills
Python, Perl, job schedulers (LSF, Slurm), circuit design methodology (Cadence/Synopsys), flow debugging, automation, infrastructure management
Preferred skills
Previous circuit design experience, exposure to circuit design workloads
Technologies
Python, Perl, LSF, Slurm, Cadence Virtuoso, Synopsys Custom Compiler
Responsibilities
Design and maintain circuit design/verification flows; monitor farm health and optimize throughput; bring up and release new compute/GPU resources; evaluate and qualify new infrastructure components; build automation for flow setup and resource allocation; debug complex multi-layer issues; develop documentation and training materials
Seniority
Senior, hands-on IC
