Platform / System Debug Validation Engineer
Core
System-level debug engineer for AMD Data Center deployments, ensuring system availability and uptime by troubleshooting complex hardware/software issues in GPU clusters.
Role type
Senior IC system debug engineer (Data Center/GPU)
Builds
High-availability GPU data center systems and clusters
Domain
Semiconductor hardware, Data Center infrastructure, GPU systems
Required skills
System-level debug, RAS (Reliability, Availability, Serviceability), GPU flow validation, electrical probing, power current analysis, hardware bring-up, root cause analysis, junior engineer mentorship
Preferred skills
Systems integration, SoC debug, external customer/partner relationship management, manufacturing failure analysis, complex cluster network troubleshooting, board-level power examination
Technologies
PCIe, VRs, RMs, retimers, HBM, internal networking, oscilloscopes, industry debug tools
Responsibilities
Debug and triage complex HW/FW issues, probe boards to check electrical and power currents, validate GPU SOC connections, guide junior engineers on service level tickets, document system initialization and debug flows
Seniority
Senior, hands-on IC
