Sr. Compiler Engineer
Core
Build a clean-slate compiler backend to turn AI workloads into microcode for custom Tensordyne hardware, optimizing for high utilization and memory efficiency.
Role type
Senior IC compiler engineer (custom accelerators)
Builds
Microcode and optimized AI inference kernels for custom silicon
Domain
Generative AI inference, custom hardware accelerators, compiler technology
Deliverable
production ML models
Required skills
Production compiler experience, MLIR/LLVM, modern C++, custom accelerator targeting, performance intuition, co-design mindset
Preferred skills
Rust, autotuning, agent-based optimization, CUDA/Triton, unconventional architectures (VLIW, systolic)
Technologies
MLIR, LLVM, C++, Rust, CUDA, Triton, CUTLASS, NCCL
Responsibilities
Contribute to backend compilation (lowering, scheduling, allocation, microcode generation); optimize memory hierarchy and data movement; develop tiling and fusion strategies; design compiler interfaces for agents and engineers; solve dynamic shape and latency problems; build cost models for non-existent silicon; feed learnings back to ISA design.
