Compiler Engineer (Mid and/or Backend)
Core
Design and optimize mid- and backend compiler pipelines targeting custom spatial accelerator hardware to convert high-level ML representations into runtime-ready code.
Role type
Mid-level IC compiler engineer (MLIR, custom hardware)
Builds
Persimmons Compiler mid- and backend, runtime libraries, and optimized execution flows for custom AI accelerators
Domain
AI hardware, compiler infrastructure, custom spatial architectures
Deliverable
production ML models
Required skills
MLIR framework expertise, C++ (5+ years), polyhedral loop optimization, SPMD/distributed collective operations, register allocation, instruction scheduling, graph/tensor partitioning, lowering techniques (bufferization, padding, inlining), custom operation integration
Preferred skills
Python, PyTorch, Triton, xDSL, pyDSL, SIMD kernel development, modern AI tools
Technologies
MLIR, LLVM IR, PyTorch, Triton, xDSL, pyDSL, C++, Python
Responsibilities
Develop MLIR-based compiler pipelines for custom spatial hardware; optimize lowering and code generation; implement transformations from Python/PyTorch to LLVM IR; architect SPMD support and specialized dialects; drive loop optimizations via polyhedral analysis; manage register allocation and scheduling; integrate custom kernels; collaborate on end-to-end compilation flows
Seniority
Mid-level, hands-on IC
