Lead Diagnostics Software Engineer, ATE Integration
Core
Lead Diagnostics Engineer migrating post-silicon software validation and System-Level Tests (SLT) into Automated Test Equipment (ATE) and Wafer Sort environments for data center GPU IPs.
Role type
Lead/Principal Diagnostics Engineer (ATE Integration)
Builds
Production-grade ATE patterns, test pipelines, and deterministic tester-friendly models for wafer sort and final test.
Domain
Semiconductor manufacturing test, data center GPU architectures, chiplet systems
Required skills
C/C++, Python, bare-metal programming, register-level programming, firmware interactions, ATE pattern generation, vector timing, clock domain management, high-volume manufacturing test, chiplet interconnect protocols (UCIe), HBM integration, DevOps/CI-CD
Preferred skills
LLM & ML model application, sideband management interface analysis, power management behavior modeling, massively parallel compute pipeline optimization
Technologies
STIL, WGL, V93000, UltraFLEX, GitHub, CI-CD pipelines
Responsibilities
Define technical roadmap for migrating SLT diagnostics to ATE/wafer sort; Architect software utilities to convert diagnostic sequences into cycle-accurate vector formats; Serve as technical liaison between diagnostics, product/test, and DFT teams; Build deterministic models emulating host behaviors on ATE hardware; Optimize tester execution times and test coverage for data center GPU IPs
Seniority
Lead/Principal, hands-on IC
