Senior Frontend PHY IC Design Engineer (DSP focus)
Core
Design, integration, verification, and bring-up of IEEE 802.11ah PHY layer for low-power Wi-Fi chips enabling IoT.
Role type
Senior IC Design Engineer (PHY/DSP)
Builds
Next-generation Wi-Fi chips for IoT devices
Domain
Semiconductor / Wireless Communications / IoT
Deliverable
production ML models | product features
Required skills
IEEE 802.11 PHY architecture, Digital Signal Processing (DSP) hardware implementation, RTL design (Chisel, SystemVerilog, Verilog), Low-power design, Multi-clock-domain design, Silicon bring-up and debugging, Linux development environment
Preferred skills
Mixed signal ASIC design, Embedded processors (RISC-V), Git revision control
Technologies
Scala (Chisel), SystemVerilog, Verilog-A, C, Python, Matlab, Cadence, Synopsys, Linux
Responsibilities
Develop 802.11ah PHY in Chisel/SystemVerilog/C; Perform functional verification in RTL/gate-level/AMS simulators; Collaborate with Systems, Analog/RF, and Firmware teams; Debug PHY performance on silicon; Provide technical expertise for mass production
Seniority
Senior, hands-on IC
