研发效能平台开发工程师（存算与AI） - 芯片研发
Core
Develop and maintain a full-lifecycle R&D efficiency platform and engineering tools for a chip design team focused on in-memory computing AI chips.
Role type
Senior IC R&D efficiency platform engineer (DevOps/AI)
Builds
R&D efficiency platform, automated testing tools/frameworks, CI/CD infrastructure
Domain
Semiconductor chip design / AI infrastructure
Deliverable
production ML models
Required skills
Python, C++, Go, CI/CD pipeline design, automated testing framework development, AI semantic analysis, Agent framework, RAG, Prompt Engineering
Preferred skills
RPC frameworks (Dubbo, gRPC), caching (Redis), message queues (Kafka, RabbitMQ), complex system architecture design
Responsibilities
Manage full lifecycle of R&D efficiency tools from requirement analysis to online operations; Develop and maintain automated testing tools and frameworks using AI for semantic analysis and test matrix generation; Design and optimize CI/CD infrastructure integrating Jenkins and GitLab CI; Implement AI in development scenarios for code generation, review, and integration testing.
