可靠性工程师（存算与AI） - 芯片研发
Core
Design and implement reliability testing for storage-computing AI chips to overcome memory wall bottlenecks and ensure high-efficiency computing for large AI models.
Role type
Senior IC reliability engineer (storage-computing/AI chips)
Builds
High-efficiency AI chips based on storage-computing architecture
Domain
Semiconductor industry + AI hardware
Deliverable
production ML models
Required skills
Reliability testing design, aging test design, DFR (Design for Reliability), statistical process control, semiconductor device physics, NOR/NAND Flash characteristics, AEC-Q101/104 standards, JEDEC standards, circuit reliability design
Preferred skills
System-level reliability analysis, customer technical solution development, reliability database management, industry standard formulation
Technologies
NOR Flash, NAND Flash, AEC-Q101, AEC-Q104, JEDEC standards
Responsibilities
Develop and execute reliability test plans and analyze data; Design system-level reliability and aging test schemes; Participate in DFR to improve circuit reliability; Support customers with reliability data and technical solutions; Maintain product reliability databases; Research chip reliability and formulate standards
