互联芯片架构师（技术规划） - 芯片研发
Core
Designing and planning interconnect chips for ByteDance's cloud infrastructure and AI workloads to optimize performance and reduce costs.
Role type
Senior IC interconnect chip architect (technical planning)
Builds
Custom hardware for cloud computing and AI scale-up/scale-out scenarios
Domain
Semiconductor / Network Infrastructure / AI
Deliverable
production ML models
Required skills
Interconnect chip architecture design, RDMA protocol, Network traffic modeling (Scale up/Out), AI workload optimization, Computer architecture (MAC, PCIe, AMBA, DDR), Physical design feasibility
Preferred skills
ESL modeling, High-performance switch architecture (12.8T+), Network processing performance modeling
Responsibilities
Define chip requirements and product specifications based on business needs, Design overall chip architecture and future roadmap, Support internal teams and software teams in integration and troubleshooting to ensure successful deployment
