Senior Director, Central Engineering – SoC Design & Modeling Methodologies
Core
Lead workload and performance analysis, hardware/software (HW/SW) optimization and co-design (including AI workloads), and SoC architecture for semiconductor products.
Role type
Senior Director, Central Engineering – SoC Design & Modeling Methodologies
Builds
Next-generation SoC architectures, virtual platforms, and design enablement strategies for Automotive, Industrial, Infrastructure, and IoT product lines.
Domain
Semiconductor / SoC Design / AI Workloads
Deliverable
production ML models
Required skills
SoC architecture, HW/SW co-design, workload characterization, performance analysis, AI workload analysis, model-based development, IP and subsystem development, SoC verification methodologies, design and verification automation flows, virtual platforms, executable specifications, SoC performance modeling
Preferred skills
Platform design, translating customer-facing requirements into system-level requirements, strategic roadmap definition, cross-functional team leadership
Technologies
Virtual platforms, executable specifications, design and verification automation flows
Responsibilities
Define and drive the strategic roadmap for workload analysis and performance for both IPs and products across the company; Lead architecture performance reviews and technical direction for complex IP/SoC and subsystem developments; Establish best practices for hardware/software co-design and model-based development; Provide technical leadership for cross-functional teams spanning architecture, design, verification, emulation, and software; Define and analyze AI workloads and the performance required for these workloads; Build and lead high-performing engineering teams; Mentor directors, principal engineers, and distinguished engineers; Influence long-term semiconductor technology and platform strategy.
Seniority
Senior Director, hands-on IC with organizational leadership
