Distinguished Engineer (DE) or Senior Director, Central Engineering – SoC Design & Modeling Methodologies
Core
Lead workload and performance analysis, HW/SW optimization, and SoC architecture for AI workloads and complex IP/subsystems.
Role type
Distinguished Engineer / Senior Director, SoC Design & Modeling Methodologies
Builds
Next-generation SoC architectures, virtual platforms, and design enablement strategies for Automotive, Industrial, Infrastructure, and IoT products.
Domain
Semiconductor / SoC Design / AI Workloads
Deliverable
production ML models
Required skills
SoC architecture, HW/SW co-design, workload analysis, performance modeling, digital design methodologies, IP development, verification methodologies, design automation flows
Preferred skills
Platform design, system-level requirements translation, executive leadership, cross-functional team leadership
Technologies
Virtual platforms, executable specifications, SoC performance modeling tools, design verification automation flows
Responsibilities
Define strategic roadmap for workload analysis and performance; lead architecture performance reviews for complex IP/SoC; establish best practices for HW/SW co-design; build and lead high-performing engineering teams; mentor directors and principal engineers; influence long-term semiconductor technology strategy.
Seniority
Distinguished Engineer / Senior Director, strategic leadership with hands-on technical direction
