CareerPlan

Mid-end and backend process technology (WET/Integration/Metal deposition/Lithography engineer)

Saijo, Ehime, jpFull-time2026-10-13 → 2026-11-12

Core

Develop and optimize mid-end and backend semiconductor manufacturing processes (WET, Integration, Metal Deposition, Lithography) for embedded Vertical Power Stages (VPS) and chiplet technologies to support AI server demand.

Role type

Mid-level IC semiconductor process engineer (WET/Integration/Metal/Lithography)

Builds

Embedded VPS (Power Tower Module), chiplet-based power devices, and advanced packaging solutions for automotive, industrial, and IoT markets.

Domain

Semiconductor manufacturing / Power electronics / Advanced packaging

Required skills

WET process development, semiconductor integration, metal deposition, lithography, process startup, yield improvement, material evaluation, equipment evaluation

Preferred skills

Power device knowledge, reliability testing, process improvement, ISO/IATF compliance

Technologies

Cu-RDL, backside metal, ultra-thinning, OPM, dicing, WET equipment, lithography tools

Responsibilities

Promote process development for new products, support manufacturing line startup and mass production transition, drive product quality and yield improvement, develop new materials and manufacturing methods, support cost reduction activities

Seniority

Mid-level, hands-on IC