Sr Analog Design Engineer
Core
Design, verification, and validation of power management ICs for high-performance computing platforms.
Role type
Senior IC analog design engineer (power management)
Builds
Power management ICs (PMICs) for high-performance computing
Domain
Semiconductor / Power Electronics / High-Performance Computing
Deliverable
production ML models | product features
Required skills
Transistor-level mixed-signal design, CMOS and bipolar transistor knowledge, feedback control theory, low-voltage and high-voltage BCD technologies, statistical simulation (Monte Carlo), Cadence tools, regulator topologies (switch-mode and linear)
Preferred skills
Precision current sensing, charge pump circuits, rail-to-rail amplifiers, integrated-FET switching regulators, behavioral modeling, automated test methodologies
Responsibilities
Perform transistor-level design of mixed-signal power management circuit blocks, evaluate circuit topology tradeoffs, oversee Layout Engineers, write design review documentation, conduct design reviews, support test specification development and lab debug
Seniority
Senior, hands-on IC design
