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Senior ICE Emulation Design Engineer

San Jose, CA, us💼 Full-time🗓 2026-06-02 → 2026-09-25

Core

Converting large, complex SOC designs and third-party IPs into emulation-ready environments for system-level validation, debugging, and performance analysis.

Role type

Senior IC emulation design engineer

Builds

Emulation environments for commercial AI servers and cloud datacenter platforms

Domain

Semiconductor hardware design and platform security

Deliverable

production ML models | product features | infrastructure

Required skills

SOC RTL design and partitioning, IP integration, high-speed interface configuration (PCIe, Ethernet, USB), low-speed interface configuration (I2C, SPI, UART), host server and boot environment setup, transactor/bridge/protocol adapter development, embedded hardware/software debugging, scripting automation (Python, Perl, TCL)

Preferred skills

Design verification, hardware/software co-simulation, Linux device drivers, bare-metal firmware, bootloaders

Technologies

PCIe, Ethernet, USB, I2C, SPI, UART, Python, Perl, TCL, RTL, SOC

Responsibilities

Partition and synthesize large SOC RTL designs for emulation; Integrate internal and third-party IPs for emulation compatibility; Configure host servers and boot environments to interact with emulated designs; Debug and root-cause embedded hardware, software, and test failures in emulation; Collaborate with RTL, DV, and SW teams to resolve system-level bugs

Seniority

Senior, hands-on IC

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