Senior Engineer, HIG-HBM Product Engineering (Media Health Reliability)
Core
Define and develop reliability stress test flows and plans for HBM products, drive DPM reduction, and perform root cause analysis on device failures using electric and physical failure analysis.
Role type
Senior IC reliability engineer (semiconductor manufacturing)
Builds
HBM memory products for data centers and AI applications
Domain
Semiconductor manufacturing / Memory technology
Deliverable
production ML models
Required skills
Reliability test flow development, Electric Failure Analysis (EFA), Physical Failure Analysis (PFA), Root cause analysis, Process conversion optimization, Risk management, Project management, Cross-functional collaboration, Machine learning (regression, classification, anomaly detection), Python scripting, Data analysis
Preferred skills
CMOS technology knowledge, DRAM architecture understanding, Device physics, JMP usage, AI/automation integration
Technologies
Python, JMP, Claude code, Agentic AI
Responsibilities
Define reliability stress test flows and plans; Manage qualification execution and gating issue resolution; Drive DPM reduction through optimized test strategies; Debug and resolve defectivity and intrinsic reliability issues; Provide recommendations for fab process conversions; Manage risks associated with DPM process conversions; Apply machine learning to reliability datasets for fail segmentation; Embed AI/automation into reliability workflows.
Seniority
Senior, hands-on IC
