Senior DSP Fixed-Point Design Engineer
Core
Bridge theoretical signal processing algorithms to high-performance, area- and power-efficient hardware implementations for aerospace applications.
Role type
Senior IC DSP Fixed-Point Design Engineer
Builds
Custom hardware accelerators for guidance, navigation, communications, and sensor processing
Domain
Aerospace / Digital Signal Processing / ASIC/FPGA
Deliverable
production ML models
Required skills
Fixed-point arithmetic, quantization noise modeling, overflow/underflow handling, dynamic range management, scaling techniques, FIR/IIR filter design, FFT architectures, multi-rate signal processing, AGC, MATLAB, C++, Python
Preferred skills
High-Level Synthesis (HLS), RTL design (Verilog/SystemVerilog), front-end ASIC flows, wireless communications standards, AI/ML hardware accelerator design
Technologies
MATLAB, C++, Python, NumPy, SciPy, Catapult HLS, Vivado, Vitis, Verilog, SystemVerilog
Responsibilities
Convert floating-point DSP algorithms into bit-true, cycle-accurate fixed-point models; Conduct quantization noise analysis and finite word-length effect studies; Define hardware-friendly DSP architectures including pipeline structures and rounding modes; Partner with RTL designers to guide implementation of hardware blocks; Generate fixed-point test vectors and golden reference models for verification; Drive micro-architectural optimizations for low power and high throughput
Seniority
Senior, hands-on IC
