Staff Silicon Design Engineer - SerDes Validation
Core
Post-silicon validation, characterization, and optimization of high-speed SerDes architectures to ensure industry standard compliance and optimal performance.
Role type
Staff Silicon Design Engineer (SerDes Validation)
Builds
High-speed I/O interfaces (PCIe, DisplayPort, Ethernet, etc.) for AMD products
Domain
Semiconductor hardware / High-speed signaling
Required skills
SerDes post-silicon validation, industry standard specifications (PCIe, JESD, OIF-CEI, IEEE 802.3), silicon debugging, validation methodology development, system-level serial link analysis, test automation scripting (Python, C/C++, TCL), lab equipment operation (BERT, oscilloscopes, PNA/VNA), MATLAB/ADS simulation
Preferred skills
Link level system analysis, system performance optimization, standard/architecture level study
Technologies
PCIe, DisplayPort, JESD, SDI, OIF-CEI-11G/25G/56G/112G, IEEE 802.3 KR/CR/CAUI/GAUI, Python, C/C++, TCL, MATLAB, ADS, BERT, Oscilloscopes, PNA/VNA
Responsibilities
Post Silicon Validation of high speed SerDes, Characterize the latest SerDes design, SerDes debug with designers on Silicon, Generate specification base on measured results, Support FAE on customer's issues relating to high Speed Ios
Seniority
Staff, hands-on IC