Silicon Design Lead
Core
Lead silicon architecture, microarchitecture, and implementation of AI-native IP and subsystems, integrating hardware security mechanisms to power frontier AI models.
Role type
Senior IC Silicon Design Lead (AI Hardware)
Builds
AI-native silicon chips and tightly integrated systems for OpenAI's supercomputing platform
Domain
Semiconductor / AI Hardware / Hardware Security
Deliverable
production ML models
Required skills
Silicon IP architecture, microarchitecture, RTL design (Verilog/SystemVerilog), hardware security implementation, performance/power/area tradeoff analysis, SoC integration
Preferred skills
Broad SoC-level architecture experience, experience with memory encryption/key management/secure boot
Technologies
Verilog, SystemVerilog, RTL, SoC
Responsibilities
Own architecture and implementation of silicon IP/subsystems; define hardware interfaces and microarchitectural tradeoffs; translate security requirements into hardware capabilities; design and integrate hardware security mechanisms; collaborate with RTL, verification, firmware, and software teams; evaluate and integrate third-party IP
Seniority
Senior, hands-on IC