Internship - PDK Engineer
Core
Develop and improve parameterized cells (Pcells) for semiconductor devices and author DRC/LVS/RCX rule decks for PDK inclusion.
Role type
Intern Process Design Kit (PDK) Engineer
Builds
Process Design Kits (PDKs) for semiconductor manufacturing
Domain
Semiconductor / VLSI / IC Design
Required skills
Python, TCL, SKILL, Ruby, Bash scripting; EDA tools (Cadence, Mentor, Calibre); Semiconductor device structure knowledge; VLSI concepts; Layout verification
Preferred skills
UNIX/Linux environment experience; MS Office proficiency
Technologies
Cadence, Mentor, Calibre, Python, TCL, SKILL, Ruby, Bash
Responsibilities
Develop parameterized cells (Pcells) for FETs, BJTs, diodes, and passive components; Author and maintain Calibre DRC, LVS, RCX, and Latchup rule decks; Implement and execute formal QA procedures for rule decks and PDK deliverables; Configure techfiles and verification scripts for EDA tools; Collaborate with Device Design, Characterization, Technology, and Fab teams; Create automation scripts for PDK build and release processes; Respond to design center requests and troubleshoot PDK issues
