STAGE - Optimisation de la cellule PCM en techno 18nm FD_SOI F/H
Core
Develop PCM cell process optimization and thermal modeling to reduce cell size and production costs for 18nm FD_SOI technology.
Role type
Intern, Process Integration NVM R&D
Builds
18nm FD_SOI microcontroller memory cells
Domain
Semiconductor manufacturing, Non-volatile memory (PCM)
Deliverable
production ML models
Required skills
Physics, Materials Science, Microelectronics, Process Integration, Thermal Modeling, Morphological Characterization
Preferred skills
Knowledge of microelectronics manufacturing processes
Responsibilities
Develop process for PCM cell size reduction, Perform morphological characterization of test runs, Conduct thermal modeling studies, Present results to process development teams