Staff Hardware Engineer
Core
Lead schematic design and front-end hardware architecture for defense and networking edge computing systems, defining block-level designs and ensuring signal/power integrity before PCB implementation.
Role type
Staff Hardware Engineer (Schematic Architect)
Builds
Next-generation edge computing platforms with AI, computer vision, and sensor fusion capabilities for military applications.
Domain
Defense technology / Hardware engineering / Analog & Digital Circuit Design
Required skills
Schematic design and capture, System-level architecture, Analog circuit design (SMPS, LDO), Power supply design, ECAD toolchain (Cadence OrCAD/Allegro), Circuit simulation (SPICE), BOM management, Root-cause analysis
Preferred skills
PCB layout best practices, High-speed digital design (x86, DDR, PCIe), Defense/networking sector experience, Linux environments, Electrical compliance (CE, FCC, RoHS)
Technologies
Cadence OrCAD, Cadence Allegro, PSpice, LTspice, x86, DDR, PCIe
Responsibilities
Lead schematic design and capture for new and existing hardware platforms; Own front-end hardware architecture including component research and selection; Design, simulate, and validate analogue and power supply circuits; Collaborate with PCB layout engineers to ensure design intent implementation; Define and execute Design Verification Testing (DVT) plans; Perform hands-on debugging and root-cause analysis of hardware prototypes; Compile and manage accurate Bills of Materials (BOMs).
Seniority
Staff, high autonomy design leader
